Name of the Centre: Centre for Advanced Studies in Electronics Science and Technology (CASEST)

 

Vision Statement:

 

To produce skilled human resources for meeting the emerging needs of the country and to execute research in the cutting areas  in the domain of Electronics Science and Technology. 

                                                                                                          

 

Mission Statements:

 

MS-1: To emerge as a centre for knowledge generation and skill development in electronics for strategic requirements of the country and sustainable living. 

 

MS2: To train students with critical thinking, problem solving and self learning skills to make them competent for next generation electronics

 

MS-3:  To undertake research in emerging technologies involving Integrated Circuits: Design, Tapeout, Test and Measurement, materials to  devices to circuits: Design, Fabrication and Testing, signal processing and system design

 

MS-4:   To promote technology transfer and entrepreneurship among the faculty and students.

 

 

Name of the Centre: CASEST

 

Name of the Academic Program M.Tech (Integrated Circuits Technology)

 

Program Educational Objectives (PEOs)

 

 

PEO-1 To train students in the current technological topics on Integrated Circuits : design, fabrication and testing

PEO-2 To impart comprehensive knowledge in the emerging technological topics on active and passive devices: materials to devices to circuits: Design, fabrication and testing

PEO-3 To train students in Device fabrication in class 1000 & class 100 clean room

PEO-4 To offer training on full cycle development of Integrated circuits, Device design using Electronic Design Automation (EDA) tool.

PEO-4 To train the students in analytical reasoning, experimental skills and attitude to collaborate between inter-disciplinary research groups 

 

Mapping Program Educational Objectives (PEOs)

with Mission Statements (MS)

 

 

MS-1

MS-2

MS-3

MS-4

PEO-1

3

3

3

3

PEO-2

3

3

3

3

PEO-3

2

3

3

3

PEO-4

1

2

2

3

PEO-5

2

3

2

2

Name of the Centre: CASEST

 

Name of the Academic Program  M.Tech (Integrated Circuits Technology)

 

Program Outcomes (POs) 

After completion of this M.Tech program, the students will be able to 

 

PO-1 Develop scientific and engineering knowledge for design, prototype and testing of devices, Integrated Circuits and systems

PO-2 Collaboration, Teamwork and project management skills

PO-3 Critical thinking for analysis, problem solving and research

PO-4 Promote Entrepreneurship and professional ethics

PO-5 Original thinking, Creativity to solve complex systems and problem formulation 

PO-6 Technical presentation and demonstration skills

 

 

Program Specific Outcomes (PSOs)

(In case of specializations in each academic program, 3 to 4)

 

PSO-1   Design and develop efficient VLSI architectures to implement digital systems, digital signal processing   algorithms and systems on FPGA/ASIC 

PSO-2:   Design of analog, RF, mixed signal IC and systems for communication, signal processing, and biomedical applications leading to IC tapeout, test and measurement.

PSO-3: Design, simulate, fabricate and test microwave and THz Integrated circuits, MEMS using EDA tool and design concepts.

PSO-4 Design,  Simulate, fabricate and characterize  microelectronic devices

PSO-5 Identify the gap and limitations in the current IC technology and propose   solutions. 


 

 

Mapping of Program Outcomes (POs) and Program Specific Outcomes (PSOs) with Program Educational Objectives (PEOs)

 

 

PEO-1

PEO-2

PEO-3

PEO-4

PEO-5

PO-1

3

3

3

2

3

PO-2

2

2

3

3

3

PO-3

2

2

2

1

3

PO-4

1

1

2

1

2

PO-5

1

2

2

2

2

PO-6

2

2

2

2

2

PSO-1

3

1

3

3

3

PSO-2

3

1

3

3

3

PSO-3

1

3

3

3

3

PSO-4

3

3

3

3

1

PSO-5

2

2

3

3

2

 

 

Note: ‘3’ in the box for ‘high-level’ mapping, 2 for ‘Medium-level’ mapping, 1 for ‘Low-level’ mapping.

 

Course Structure – M. Tech. (ICT)

Semester     I                                                                                      Total No. of Credits : 24

Course No.

Title of the course

Contact Hours

Credits

IC401

Semiconductor Device Physics  and Modeling      

4

4

IC402

Micro  & Nano Fabrication Technology for ICs

4

4

IC403

Digital VLSI System Design                             

4

4

IC404

RF and Microwave IC's                              

4

4

IC405

Semiconductor Processing, Characterization and Simulation Laboratory   

6

3

IC406

IC     Design Laboratory                        

6

3

IC407

RF and Microwave IC Laboratory                         

4

2

IC 408

Analog and Mixed Signal IC Design

4

4

 

Semester II                                                                                      Total No. of Credits : 26

Course No.

Title of the course

Contact Hours

Credits

IC451

Process, Device and Circuit Modeling and Analysis                          

4

4

IC452

MEMS and THz Technology

4

4

IC453

Digital IC Design                  

4

4

IC454

VLSI Signal Processing

4

4

IC455

 IC Fabrication Technology Laboratory

8

4

IC456

MEMS Laboratory

4

2

IC457

IC     Design Laboratory-II

8

4

 

Semester     III                                                                                   Total No. of Credits : 24

Course No.

Title of the course

Contact Hours

Credits

IC458

Project Work + Seminar

 

24

 

Semester     IV                                                                                 Total No. of Credits : 24

Course No.

Title of the course

Contact Hours

Credits

IC458

Project Work + Dissertation + Viva

Semester

24

 


 

Name of the  Centre :CASEST

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:   IC401 Title of the course: Semiconductor Device Physics  and Modeling      

L-T-P:   3+1+0             Credits: 4

Prerequisite Course / Knowledge (If any): Nil

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Discuss advanced physical concepts in Semiconductor Electronics such as carrier and impurity statistics, and hot carriers transport effects.

CO-2: Analyze electronic model for the charge distribution at a semiconductor interface as a function of the interface conditions

CO-3: Discuss the operation of several basic semiconductor devices: p-n junctions, metal-semiconductor junctions, Diodes, metal oxide semiconductor field effect transistors (MOSFETs), Complementary MOSFETs (CMOS).

CO-4 : Apply the concepts related to device physics and modelling to solve problems

CO 5:  Design new problems related to device and modelling  

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

PSO5

CO1

2

3

3

1

3

2

3

2

1

3

3

CO2

3

3

3

1

3

2

3

2

1

3

3

CO3

3

3

3

1

3

2

3

2

1

3

3

CO4

3

3

3

1

3

3

3

2

1

3

3

CO5

3

3

3

1

3

3

3

2

1

3

3

 

Note: ‘3’ in the box for ‘High-level’mapping, 2 for ‘Medium-level’mapping, 1 for ‘Low’-level’mapping

 

Detailed syllabus:

 

Unit I  

Overview of Semiconductor  Physics- Crystal Structure, Concepts of Band structure, Valence and Conduction bands and Electrons and Holes, Density of States, Carrier statistics, Equilibrium carrier concentrations in intrinsic and doped semi-conductors.

Carrier mobility and scattering mechanisms recombination / lifetime due to various mechanisms, determination of carrier mobilities and life times, photoconductivity.

 

Unit II

p-n junctions- Band structures across homogeneous junctions, depletion widths and capacitances of abrupt and linearly graded junctions, current flow through p –n junctions, ideal and practical  I-V Characteristics, breakdown, heterogeneous junctions

 

Unit III

BJTs:   current through a BJT, current gain and its dependence on various factors, Ebers-Moll and Gummel-Poon Models

 

Unit IV

Schottky junctions: Metal Semi-conductor junctions, determination of work-functions and barriers heights, Band structures across junctions, Schottky diode and its I-V Characteristics

 

Unit V

Unipolar devices: JFETs, MESFETs,  MOS structures, Band Structure, CV curves, Strong inversion condition, MOSFET characteristics, depletion and enhancement structures, short-channel and hot-carrier effects, HEMT, HBT

 

Books:

 

Physics of Semi-conductor Devices-           S.M. Sze

Semi-conductor Devices – Physics and technology  - S. M. Sze

 

Name of the Centre: CASEST

 

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC402 : Title of the course :Micro  & Nano Fabrication Technology for ICs

 

L-T-P:   3+1+0            Credits: 4

Prerequisite Course / Knowledge (If any): Nil

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Describe the structure and fabrication process steps for the most popular devices.

CO-2:  Identify the technological problems and their resolution in IC fabrication technology. 

CO-3: Distinguish between various processes required for Micro-electronic device fabrication 

CO-4: Design and simulate fabrication process steps for specific devices. 

CO-5: Evaluate different technologies for selecting a suitable one for a specific device. 

 

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

PSO5

CO1

3

0

2

2

2

2

1

2

2

3

2

CO2

3

1

2

2

2

1

2

2

2

3

1

CO3

3

2

3

3

2

2

1

2

1

3

2

CO4

3

2

3

3

3

3

2

2

2

3

2

CO5

3

2

3

3

3

3

2

2

2

3

3


 

Note: ‘3’ in the box for ‘High-level’ mapping, 2 for ‘Medium-level’ mapping, 1 for ‘Low’-level’ mapping


 

Detailed Syllabus:

 

Unit 1 (10 hours):

  • Basic Device structures: BJT, MOSFET, MESFET, capacitors, resistors
  • Design rules, self-alignment, device isolation, oxide breakdown and protection
  • Process stream/steps: Bipolar, NMOS, CMOS, GaAsFET, ULSI issues

 

Unit 2 (8 hours):

  • Wafer fabrication- EGS, Czochralski technique for Si and GaAs, Wafer fab.
  • Epitaxy: MBE, CVD

 

Unit 3 (6 hours):

  • Lithography- Photoresists, optical and electron beam lithography

 

Unit 4 (16 hours):

  • Ion implantation
  • Oxidation
  • Thin films deposition- vacuum techniques, sputtering techniques, e-beam and resistive heating evaporation
  • Etching: wet etching, RIE, RIBE, etchants

 

Unit 5 (4 hours):

  • Packaging- Die-bonding, wire-bonding, flip-chip technology
  • Testing and Yield estimation
  • Clean room methodologies 

 

Unit 6:

  • Self study and seminars (optional as determined by course instructor) : 

Structure and fabrication technology for memory elements,  sensors, opto-electronic devices, etc

 

 

Books:

 

  1. Science and engineering of microelectronic Fabrication by Stephen Campbell (Oxford University Press; Second edition (2012))

 

  1. VLSI Technology       by S.M.Sze (McGraw Hill Education; 2 edition (2017))

 

  1. VLSI Design Techniques for Analog and Digital Circuits by R. L. Geiger, P.E. Allen, and N. R. Strader (McGraw-Hill College (1989))

 

Name of the  Centre :CASEST

 

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC403 Title of the Course: Digital VLSI System Design 

L-T-P:   3-1-0               Credits: 4

Prerequisite Course / Knowledge : Nil

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Explain  the principle and steps to implement Digital  design on FPGA 

CO-2: Design, and evaluate combinational and sequential digital sub blocks using different coding styles

CO-3 Analyze the role of different synthesis algorithms and approaches to   Digital Design.

CO-4 Explain the semicustom and full custom design flow

CO-5 Build a system on chip solution for digital design using FPGA

 

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

2

2

1

1

1

3

3

1

1

1

2

CO2

3

3

3

1

3

3

3

2

1

 

2

CO3

1

3

3

1

3

2

3

 

1

 

1

CO4

1

3

2

1

2

3

3

1

1

1

1

CO5

3

3

1

2

3

3

3

2

1

 

1


Note:   ‘3’ in the box for ‘High-level’mapping, 2 for ‘Medium-level’mapping, 1 for ‘Low’-level’mapping


 

 

Detailed Syllabus:

 

Unit -I  Design styles of IC, VLSI Design flow , Introduction to FPGA,  The need for a language to design digital circuits, Verilog language elements and data types. Structural style modelling, Data flow modeling, Behavioral modelling.

 

Unit-II:  Combinational logic designSequential logic designArithmetic circuit designSynthesis of RAM, ROM ,FSM design, FSM Based Modeling of Digital Circuits, 

 

Unit III:  Logic synthesis: two level, multilevel, high level synthesis algorithms , Technology maping, Timing analysis

 

Unit IV : Physical design: Floor planning, Placement, Cock tree synthesis, detailed routing, packaging, signoff. (Qualitative overview and problem formulation only)

 

Unit V : Introduction to embedded system design, system design methodologies, Introduction to System on Chip,  System on chip design flow, Embedded processor architecture,  Profiling approach, Hw-SW codesign.

 

Text books: 

  1. Verilog Digital System Design RT Level Synthesis, Testbench and Verification by Z. Navabi, McGraw Hill (2005) ISBN-13: 978-0071445641
  1. Fundamentals of Digital Logic with Verilog Design, By Stephen Brown, Zvonko Vranesic Tata McGraw-Hill edition.
  2. Computer System Design System-on-Chip Michael J. Flynn Wayne Luk,published by Published by John Wiley & Sons (2011), ISBN 978-0-470-64336-5 

Reference books: 

  1. Embedded Core Design with FPGAs, Z. Navabi McGraw Hill (2007), ISBN 978-0-07-147481-8.
  2. Synthesis and optimization of Digital Circuits by G.D.Michelli, Springer.

 

 

 

 

Name of the  Centre :CASEST

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC404 Title of the Course: RF/ Microwave ICs

L-T-P: 3-1-0                 Credits: 4

Prerequisite Course / Knowledge (If any): 

 

The following courses at the B.Tech or M.Sc level.

 

  1. Electromagnetic Theory
  2. Advanced Mathematical Methods

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Analyze the difference between high frequency ICs and conventional ICs and apply transmission line and distributed element based approaches to solve problems with high frequency circuits.  

CO-2: Apply impedance matching   techniques for different circuit conditions and frequency ranges. Use of Smith charts.

CO-3 Evaluate ways to miniaturize the high frequency passives, interconnects and active devices and also by multilayering.

CO-4 Analyze different types of planar transmission lines and their design considerations. 

CO-5 Apply the design approach in planar circuits with filter as an example. (Lumped to distributed conversion).

CO-6  Apply softwares to achieve high frequency circuit design goals along with IC 407 course.

CO-7  Evaluate emerging high frequency miniaturization techniques through a Term Paper.

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

3

1

3

3

2

3

1

2

3

1

3

CO2

3

1

3

1

3

2

1

2

3

1

1

CO3

3

1

3

3

3

1

1

2

3

1

3

CO4

3

1

3

3

3

1

1

2

3

1

3

CO5

3

3

3

3

3

2

1

2

3

1

3

CO6

3

3

3

3

3

2

1

2

3

1

3

CO7

3

3

3

3

3

3

1

2

3

1

3

 

Detailed Syllabus:

 

UNIT-1 High Frequency Electronics

Why RF communication?, Unique features of RF communication. Lumped vs. Distributed approach. Why RF circuits are to be treated differently in both active and passive devices? How Miniaturization leads to higher frequency operation? Introduction to high frequency ICs. Challenges and ways to miniaturize a high frequency circuit. Hybrid and integrated approach. High frequency ICs with lumped elements. MIC, MMIC and RFICs. Low frequency vs. High frequency models and parameters. 

 

UNIT-II Transmission Line Theory, Impedance Transformation and Matching

Review of EM Theory and Transmission lines. Impedance transformation and its effect on microwave circuits. Transmission line sections as circuit elements. Smith chart and admittance chart. Impedance matching techniques for narrow band and broadband operation. Impedance matching using T.line sections, quarter wave lines and lumped elements.

 

UNIT –III Planar Transmission Lines 

Planar transmission lines that can be miniaturized: Striplines, Microstriplines, Coplanar waveguides. Design and analysis of microstrip and coplanar waveguide circuits. T.Line discontinuities as circuit elements. 

 

UNIT –IV Materials, Fabrication and Miniaturization

Substrates for transmission lines – dielectrics vs semiconductors. Lumped L,C and R and their models. Parasitics in high frequency circuits and ways to model them. 

Materials used for their realization and their properties: Substrates, conductors, semiconductors, dielectrics and magnetic materials. Micromachining for lumped elements and T.Lines, RF MEMS, Integrated inductors and surface integrated waveguides. 

 

 

UNIT –V Microwave Filter Design, Realization and Testing.

Microwave filter design. Filters using transmission line sections. Kuroda’s Identities. Richard’s transformation. Microwave Resonators, Filters using resonators, Varactors and tuning techniques, On wafer probing and on wafer calibration techniques.

 

 

Text Books:

 

David M. Pozar, “Microwave Engineering,” 2nd Edition, John Wiley 1998, ISBN 0-471-17096-8.

Peter A. Rizzi, “Microwave Engineering – Passive Circuits”, PHI, ISBN  81-203-1461-1

 

I.D. Robertson and S.Lucyszyn,  RFIC and MMIC design and technology, , IEE Circuits, Devices and Systems Series 13. ISBN-10 : 0852967861

 

Related IEEE Journal Papers

 

Reference Books: 

 

K. C. Gupta, Ramesh Garg, Inder Bahl, and Prakash Bhartia, “Microstrip Lines and Slotlines,” Artech House, 2nd edition, 1996, ISBN: 089006766X.

 

T. C. Edwards and M. B. Steer, “Foundations of Interconnect and Microstrip Design,” John Wiley & Sons, 3rd edition, 2001, ISBN: 0471607010.

 

Mike Golio (Ed.), The RF and Microwave Handbook, CRC Press. ISBN: 9780849385926.

 

Novel technologies for microwave and millimeter-wave applications, Jean-Fu Kiang, Kluwer Academic Publishers. ISBN -10: 1441954015.


 

Name of the Centre: CASEST

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC405 

Title of the course: Semiconductor Processing, Characterization and Simulation Laboratory

L-T-P:   1-0-5   Credits: 3

Prerequisite Course / Knowledge (If any): Basics of semiconductor devices and methods of fabrication, at BTech level. 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Process various materials/layers of a modern semiconductor device, analyze physical behavior and correlate with performance. 

CO-2: Test discrete semiconductor devices using an industry standard method, analyse and interpret results. 

CO-3: Characterize semiconductors for their applications in device fabrication.  

CO-4: Explain the concepts of various device simulation program. 

CO-5: Simulate device and circuit performance: Application, validation and 

interpretation of results. 

CO-5: Evaluate the performance of various semiconductor devices and 

Circuits.

CO-6: Communicate the results of all experiments in the form of a written 

             technical report. 

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

PSO5

CO1

2

1

3

1

3

2

0

1

0

3

2

CO2

3

2

3

1

3

2

0

1

0

3

1

CO3

2

1

3

1

3

2

0

1

0

3

2

CO4

3

3

3

2

3

3

0

2

0

3

3

CO5

3

3

3

3

3

3

0

2

0

3

3

CO6

2

3

1

1

1

3

0

0

0

2

2

 


 

Detailed Syllabus:

 

 

  1. Thin film deposition by physical vapour deposition and characterization
  2. Synthesis of novel 2D materials such as graphene
  3. Thermal oxidation of Si
  4. Device characterization using Device Analyser
  5. Estimation of Optical Band gap of a semiconductor
  6. Process Simulation-(ion implantation, diffusion, oxidation)
  7. Device Simulation- (p-n Diode, Schottky diode, MOSFET)

      6.    Circuit Simulation-  (MOSFET based circuits)

             

Text books: 

  1. "Semiconductor Material and Device Characterization" by Dieter K. Schroder (Wiley-IEEE Press; 3 edition (2015)
  2. Science and engineering of microelectronic Fabrication by Stephen Campbell Oxford (University Press; Second edition (2012))
  3. VLSI Technology S.M.Sze (McGraw Hill Education; 2 edition (2017))

 


 

Name of the Centre: CASEST

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC406 Title of the Course:  IC Design Laboratory-1

L-T-P:   0-0-6               Credits: 3

Prerequisite Course / Knowledge (If any): IC402 and IC403 courses

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Design and verify the functionality of   combinational and sequential circuits using Verilog HDL.

 

 

CO2: Implement and carry-out on chip debugging of the digital design on FPGA.

 

CO3: Design and simulate the basic analog integrated circuits like CMOS amplifiers and biasing circuits.

 

 

CO4: Design of integrated circuits for target specifications and checking the robustness of the design at different process corners

 

CO5: Implement physical design of integrated circuits, DRC and LVS check, post-layout extracted simulation.

 

CO6: Communicate the results of the experiment in the form of written technical report.

 

 

Mapping of Course Outcomes (Cos) with Program Outcomes (Pos)

and Program Specific Outcomes (PSOs)

 

 

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

2

3

2

-

2

2

3

2

2

3

2

CO2

2

3

2

-

2

2

3

2

2

2

2

CO3

2

3

2

2

2

2

3

2

3

2

2

CO4

2

3

2

2

3

2

3

2

3

2

3

CO5

2

2

2

2

3

2

2

2

2

2

3

CO6

3

2

2

3

2

3

2

2

2

2

2


 

Detailed syllabus: 

 

List of experiments and mini-projects

 

1: Vivado Design Flow

2: Synthesizing a RTL Design

3: Implementing the Design

4: Using the IP Catalog and IP Integrator

5: Hardware Debugging

6: Analog and Mixed Signal IC Design Lab Projects

  1. CS and CG amplifiers with different loads, e.g., resistive, diode connected, current source
  2. Current mirrors, e.g., basic current mirror, cascode current mirror
  3. Differential amplifier
  4. Operational Transconductance amplifiers

 

 


 

Name of the  Centre :CASEST

 

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC407  Title of the Course: RF/ Microwave IC Laboratory 

L-T-P:   0-0-4               Credits: 2

Prerequisite Course / Knowledge (If any): It is the Lab component of the IC403 RF/Microwave ICs Course.

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Apply microwave measurement techniques using advanced measurement facilities like VNA. 

CO-2: Apply the usage of EDA tools in doing high frequency circuit Design and Simulation. 

CO-3 Apply EDA tools to Design and Simulate passive MIC circuits and active microwave circuits. 

CO-4 Apply EDA tools for doing Full wave simulations by Method of Moments, FEM and FDTD. 

CO-5 Analyze EDA tools to do Fullwave simulation and analysis of layout of high frequency circuits. 

CO-6 Create high frequency circuits using EDA tools and simulate them. 

CO-7 Fabricate the high frequency circuits. 

CO-8 Communicate the results of these experiments in the form of a written technical report.

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

3

2

3

3

3

3

1

2

3

1

3

CO2

3

3

3

3

3

3

1

2

3

1

1

CO3

3

3

3

3

3

3

1

2

3

1

3

CO4

3

3

3

3

3

3

1

2

3

1

3

CO5

3

3

3

3

3

2

1

2

3

1

3

CO6

3

3

3

3

3

3

1

2

3

1

3

CO7

3

3

3

3

3

3

1

2

3

1

3

CO8

3

1

1

3

1

3

1

2

3

1

3

List of experiments/ Mini -projects

 

  1. Microwave measurement techniques for devices and circuits with Vector Network Analyzer, Power Meter and On Wafer Probing System.
  2. Tools for high frequency design, Familiarization of EDA tools for RF/ Microwave IC design and simulation, Usage of Models and Libraries for EDA tools, Design Examples (using both active and passive devices).
  3. Fullwave analysis in simulation and analysis of circuit layouts and housings using Method of Moments, FEM and FDTD.
  4. Design and simulation of active and passive microwave integrated circuits using EDA tools.
    • The list of passive circuits includes: Dividers, Filters, Couplers, Tees, Circulators etc
    • The list of active circuits includes : Amplifiers, oscillators, switches, phase shifters, mixers etc
    • Design and Simulation of some of the above circuits/ devices will be done in the classes and remaining to be done as assignments.

 

  1. Fabrication and characterization of at least one of the above devices (in project mode. Extending to Semester break).

 

References:

  1. Practical RF Circuit Design for Modern Wireless Systems: Active Circuits and Systems Vol I and II, Les Besser and Rowan Gilmore. Artech House, ISBN-10: 1580535224
  2. RF circuit design, by Christopher Bowick, Elsevier. ISBN-10: 0750685182
  3.  Reading Material provided by the EDA tool used.

4.  100 ADS Design Examples: Based on the Textbook: RF and Microwave Circuit Design, Ali A. Behagi, ISBN-10: 0996446621, Techno Search.

5. Related IEEE Papers.

 

Name of the Centre: CASEST

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC408 Title of the Course: Analog and Mixed Signal IC Design 

L-T-P:   3-1-0               Credits: 4

Prerequisite Course / Knowledge (If any): Nil

 

Course Outcomes (COs) 

 

After completion of this course, the students will be able to

CO 1: Apply the knowledge of different biasing styles for different electronic circuits (Apply level)

CO 2: Design basic building blocks of analog ICs up to layout level.(Apply)

CO 3: Develop a procedure for optimal compensation of op-amp against 

           process, supply and temperature variations (Apply)

CO 4: Identify suitable topologies of the constituent sub-systems and  

           corresponding circuits as per the specifications of the system (Analyze)

CO 5: Design an optimally compensated Op-amp including parasitic effects up 

            to the  tape-out (create level)

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

2

2

1

1

1

3

3

1

1

1

2

CO2

3

3

3

1

3

3

3

2

3

3

2

CO3

1

1

1

3

1

2

3

1

3

3

1

CO4

1

1

3

3

1

3

3

1

3

2

1

CO5

3

1

3

2

1

3

3

2

1

1

1


 

Note:   ‘3’ in the box for ‘High-level’ mapping, 2 for ‘Medium-level’ mapping, 1 for ‘Low’-level’ mapping


 

Detailed Syllabus:

 

Course Contents:

Unit-1: MOS Device Structure and Circuit Models, Single-Stage and Differential Amplifiers, Passive and Active Current Mirrors, single- & multi-stage amplifier design

Unit-2: Frequency Response of Amplifiers, Noise, Feedback, Op Amp Design, Stability and Frequency Compensation

Unit-3: Bandgap References, Introduction to Switched-Capacitor Circuits, Analog and Mixed Signal Layout Design Flow

Unit-4: Introduction to Switched Capacitor Circuits, Sampling circuits and architecture Introduction to Data convertors, digital to analog conversion, analog to digital conversion and oversampled converters

 

================================================================

Text books: 

  1. B. Razavi, Design of Analog CMOS Integrated Circuits, McGraw-Hill, 2001. 

Reference books: 

  1. P. R. Gray and R. G. Meyer, Analysis and Design of Analog Integrated Circuits, 4th Edition, 2001, Wiley. 
  2. D. A. Johns and K. Martin, Analog Integrated Circuit Design, Wiley, 1997.
  3. Synthesis and optimization of Digital Circuits by G. D. Michelli, Springer.

 

 

 

 

 

 

 

 

 

 

 


 

Name of the Centre :CASEST

 

Name of the Academic Program M.Tech (IC Technology)

 

Course Code:  IC451: Process , Device and Circuit Modeling and Analysis

L-T-P:   3+1+0             Credits: 4

Prerequisite Course / Knowledge (If any): Nill

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Define  physics involved in modelling of semiconductor device

CO-2: Apply knowledge of mathematics, science, and engineering to design and analysis of modern analog integrated circuits.

CO-3: Compose research/investigation, design and development work to solve problems faced by the industry

CO-4 : Evaluate the True roots using Open method: Newton’s Rapson method, secant method and multiple Newton Rapson method and understand the pitfalls of Gauss Elimination Method

CO-5: Explain the CMOS fabrication, device and process integration using technology computer-aided designed (TCAD) simulation tools.

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

PSO5

CO1

3

3

3

0

3

1

0

0

0

3

3

CO2

3

3

3

0

3

1

0

0

0

3

3

CO3

3

3

3

0

3

1

0

0

0

3

3

CO4

3

3

3

0

3

1

0

0

0

3

3

CO5

3

3

3

0

3

1

0

0

0

3

3

 

 

 

 

 

 

 

 


 

Detailed Syllabus:

 

Unit I

Process Simulation – Overview of basic FET ad BJT process flows, physical models and simulation techniques for unit process such as etching, thermal oxidation, diffusion, ion implantation and process integration.           

 

Unit II

 

Device Modeling - Overview of basic device structures (BJT, FET and MOSFETs), basic concepts of Carrier transport; drift-diffusion, hydrodynamic, energy balance.  Numerical methods, meshing (fixed & adaptive), numerical solutions, common methods (Newton, Gummel etc.), DC & AC simulation, transient simulation, Monte Carlo, 

 

Unit III

 

DC electrical simulation; thermionic current, Fowler Nordheim tunneling, direct tunnel current, damage, interface states, trap assisted tunneling, lattice heating, thermal properties of device, thermal boundaries, Metal & dielectic modeling, RC delays. Future trends in TCAD, 3-D modeling, 

 

Unit IV

Circuit Simulation –Nodal equations, Linear Equation Solution, Gaussian elimination and LU factorization, Linear dc and transient analysis, Sparse matrix behavior, Nonlinear Equation Solution, Transient Simulation, Convergence

 

Text & Reference Books:

  1. J.S. Yuan, J.J. Liou, Semiconductor Device Physics and Simulation
  2. S Selberherr, Analysis and Simulation of Semiconductor Devices
  3. T. L. Pillage, R. A. Rohrer, and C. Visweswariah, Electronic Circuit & System Simulation Methods
  4. Silicon VLSI Technology: Fundamentals, Practice, and Modeling, Jim Plummer, Michael D. Deal, and Peter B. Griffin


 

Name of the  Centre :CASEST

 

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC452  Title of the Course: MEMS and THz Technology 

L-T-P:   3-1-0               Credits: 4

Prerequisite Course / Knowledge (If any): B.Tech or M.Sc in an area related to Electronics or Physics.

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Analyze the emergent technologies for MEMS as well as THz technology  and evaluate the need and relevance of these technologies in emerging Communication technologies.  

CO-2: Analyze why micromachining is important for sensors and the issues involved in their design, fabrication and signal transduction. 

CO-3 Evaluate the Bulk and Surface micromachining technologies and applicability of   Micromachining in the high frequency Electronics.

CO-4 Explain the THz frequency range,  the difficulties in using this part of the spectrum  and the solutions available as well as emerging,   to overcome these difficulties. 

CO-5 Apply the technologies, devices and circuits using semiconductors that are available or emerging  to realize communication in THz range of frequencies. 

CO-6 Evaluate the importance of  MEMS and THz technologies in emerging security and communication technologies.   

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

3

2

3

3

3

1

1

2

3

1

3

CO2

3

2

3

3

3

2

1

2

3

1

1

CO3

3

2

3

3

3

1

1

2

3

1

3

CO4

3

2

3

3

3

2

1

2

3

1

3

CO5

3

2

3

3

3

2

1

2

3

1

3

CO6

3

3

3

3

3

3

1

2

3

1

3

 

 


 

Detailed Syllabus

 

Unit -1

Micromachining vs. Microelectronics, Micromachining and Electronics. Microsystems, Scaling laws

Unit -II

MEMS and Sensors, Silicon and other substrates for MEMS. Micromachining processes.

Signal transduction methods, MEMS IN RF Electronics. MEMS Design and packaging.

Unit- III

THz range of em spectrum. Atmospheric propagation characteristics of THz radiation.

Why THz in Electronics? Active devices for THz operation. Passive devices for THz operation.

Materials for THz technology.

Unit- IV

Surface Integrated Waveguides and micromachined components for THz operation.  THz circuits for communication. THz for security applications. Design and simulation of THz circuits.

Unit –V  Assignment: What is the circuitry required to use a particular commercial MEMS device in an application?

References:

 1. Microsystem Design by Stephen D Seturia, Springer, ISBN-10 : 9788181285461

2. MEMS & Microsystems design and Manufacture, Tai-Ran Hsu, McGraw Hill Education,             ISBN 10- 007048709X

3. Semiconductor Terahertz technology: Devices and Systems at Room Temperature Operation. By Guillermo Carpintero et.al, IEEE Press., ISBN -13: 978-1118920428

Related IEEE Journal Papers

 

 

 

 

 

 

 


 

Name of the  Centre :CASEST

 

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC453 Title of the CourseDigital IC Design 

L-T-P:   3-1-0               Credits: 4

Prerequisite Course / Knowledge (If any): Nil

 

Course Outcomes (COs) 

 

After completion of this course, the students will be able to

CO1 Design CMOS inverters with specified noise margin and propagation delay.

CO2 Implement efficient techniques at circuit level for improving power and 

          speed of digital circuits

CO3 Identify sources of power consumption in a given VLSI Circuit

CO4 Estimate dynamic and leakage power components in a DSM 

         VLSI circuit 

CO5 Analyze the dynamic and leakage power components in a DSM 

         VLSI circuit 

CO6 Estimate power consumption at different levels of abstraction in a VLSI   

         system.

 

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

3

3

2

3

1

3

3

3

3

3

2

CO2

2

3

1

2

3

3

3

3

2

3

1

CO3

3

3

1

3

3

2

3

2

3

3

1

CO4

3

3

2

3

2

3

3

3

3

3

2

CO5

3

3

1

2

3

3

3

2

1

1

1

C06

1

3

3

2

3

2

3

2

3

3

1

 

Note:   ‘3’ in the box for ‘High-level’mapping, 2 for ‘Medium-level’mapping, 1 for ‘Low’-level’mapping

 

 

 


 

Detailed Syllabus:Unit-1: INTRODUCTION: A Historical Perspective; Issues in Digital Integrated Circuit Design; Quality Metrics of a Digital Design; Cost of an Integrated Circuit; Functionality and Robustness; Performance; Power and Energy Consumption; A Word on Process Variations; Perspective: Technology Scaling, More than Moore, New Technologies like: FDSOI, FINFET, 3D IC’s. etc., Interconnect Parameters — Capacitance, Resistance, and Inductance; Electrical Wire Models; The Ideal Wire; The Lumped Model; The Lumped RC model; The Distributed rc Line; The Transmission Line; SPICE Wire Models; Distributed rc Lines in SPICE; Transmission Line Models in SPICE.

Unit-2: THE CMOS INVERTER: The Static CMOS Inverter — An Intuitive Perspective; Evaluating the Robustness of the CMOS Inverter: The Static Behaviour;  Switching Threshold; Noise Margins; Robustness Revisited; Performance of CMOS Inverter: The Dynamic Behaviour; Computing the Capacitances; Propagation Delay: First-Order Analysis; Propagation Delay from a Design Perspective; Power, Energy, and Energy-Delay; Dynamic Power Consumption; Static Consumption; Putting It All Together; Analysing Power Consumption; Technology Scaling and its Impact on the Inverter Metrics.

Unit-3 DESIGNING COMBINATIONAL AND SEQUENTIAL CIRCUITS: Static CMOS Design; Complementary CMOS; Ratioed Logic;  Pass-Transistor Logic; Dynamic CMOS Design; How to Choose a Logic Style; Designing Logic for Reduced Supply Voltages.  Timing Metrics for Sequential Circuits; Classification of Memory Elements; Static Latches and Registers; The Bistability Principle; Multiplexer-Based Latches; Master-Slave Edge-Triggered Register; Low-Voltage Static Latches; Static SR Flip-Flops—Writing Data by Pure Force;  Dynamic Latches and Registers; Dynamic Transmission-Gate Edge-triggered Registers; C2MOS—A Clock-Skew Insensitive Approach ; True Single-Phase Clocked Register (TSPCR). 

Unit-4 TIMING ISSUES IN DIGITAL CIRCUITS: Timing Classification of Digital Systems; Synchronous Interconnect; Mesochronous interconnect; Plesiochronous Interconnect; Asynchronous Interconnect; Synchronous Design — An In-depth Perspective; Synchronous Timing Basics; Sources of Skew and Jitter; Clock-Distribution Techniques. Latch-Based Clocking, Clocking in IC’s: Basic Concepts PLL and DLL; Building Blocks of a PLL; Future Directions and Perspectives; Distributed Clocking Using DLLs; Synchronous versus Asynchronous Design.

Text Books:

Jan Rabaey, AnanthaChandrakasan, and Borivoje Nikolic, Digital Integrated Circuits: A Design Perspective, 2nd edition, Prentice Hall, 2003.

Reference Books:

N. Weste and D. Harris, CMOS VLSI Design: A Circuits and Systems Perspective, 3rd edition, Addison-Wesley, 2005.

D.A. Hodges, H.G. Jackson, and R.A. Saleh, Analysis and Design of Digital Integrated Circuits in Deep Submicron Technology, 3rd edition, McGraw Hill, 2004.


 

Name of the  Centre :CASEST

 

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC454 Title of the Course: VLSI Signal processing 

L-T-P:   3-1-0               Credits: 4

Prerequisite Course / Knowledge : IC403 course

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Explain  the methodologies to design custom or semicustom VLSI circuits of  DSP algorithms. 

CO-2: Apply   speed/area/power optimized architectural techniques to DSP algorithms.

CO-3 Analyze the role of different architectural techniques on target performance indicators

CO-4 Design a DSP system using FPGA

CO-5 Create new architecture for different DSP units/subunits

 

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

2

2

2

1

1

1

3

2

 

 

1

CO2

3

2

3

2

2

1

3

2

 

 

1

CO3

3

2

3

1

2

2

3

1

 

 

2

CO4

3

2

2

2

2

1

3

1

 

 

2

CO5

3

2

3

3

3

2

3

1

 

 

2

 

Note: ‘3’ in the box for ‘High-level’mapping, 2 for ‘Medium-level’mapping, 1 for ‘Low’-level’mapping

 

 

 

 

 

 


 

Detailed syllabus

 

Unit-1

DSP Algorithm Design – DSP Representation (Data-flow, Control-flow, Signal-flow graphs and block diagrams), filter structures, Iteration bound, Longest Path Matrix algorithm, 

Unit-II

Circuit and Architecture Design – Hardware design of real and complex multiplication and addition.  Pipelining, parallel processing, Retiming

Unit III: Unfolding, Folding, Systolic architecture design, Fast Convolution algorithms

Unit- IV

Algorithm strength reduction in Filters, Bit level arithmetic architectures: bit-parallel, bit-serial Multiplier, Distributed arithmetic architecture,  

Unit-V 

Speed/area optimized architecture for matrix multiplication, matrix inversion, CORDIC architecture, Speed/area optimized architecture of  FFT, redundant number systems, scaling and round off noise,  Case study- 1:  FPGA of implementation of artificial neural network, case study -2: FPGA implementation of Orthogonal matching Pursuit algorithm, 

Books recommended:

 

  1. K.K. Parhi – VLSI Digital Signal Processing Systems – Design and Implementation, Wiley publication (2015 reprint)
  2. Roger Woods, John McAllister, Gaye Lightbody, Ying Yi, FPGA-based implementation of Signal Processing systems, Wiley publication (2008)

 

References:

  • Pramod Kumar Meher, On Efficient Retiming Of Fixed-Point Circuits, IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 24, NO. 4, APRIL 2016
  • Supriya Aggarwal, Pramod K. Meher, And Kavita Khare Concept, Design, And Implementation Of Reconfigurable CORDIC , IEEE TRANSACTIONS ON VERY LARGE SCALE INTEGRATION (VLSI) SYSTEMS, VOL. 24, NO. 4, APRIL 2016
  • Lakshmi, B. And Dhar, A. S.CORDIC Architectures: A Survey, VLSI Design, Hindwai,  Volume 2010 , Article ID 794891 
  • IEEE papers related to VLSI signal processing

 


 

Name of the Centre: CASEST

 

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC455 : Title of the course:  IC Fabrication Technology Laboratory

L-T-P:   1-0-7               Credits: 4

Prerequisite Course / Knowledge (If any): Nil

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Gain hands on experience and skills in Micro-electronic device processing and clean-room practices involved in Integrated Circuit fabrication industry.

CO-2: Analyze the process protocols/steps followed in IC fabrication technology. 

CO-3: Analyze the physical reasons that are limiting the current fabrication 

technology and Propose new procedures to overcome these limits. 

CO-4: Fabricate and test GaAs based Schottky Diode and MESFET structures. 

CO-5: Fabricate and test Si based Schottky Diode and MOS Capacitor. 

CO-6: Discuss the role of processing in device functionalities and propose new / alternate device structures / parameters / processes.

CO-7: Communicate the results of all experiments in the form of a written 

             technical report. 

 

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

PSO5

CO1

3

1

1

2

1

1

0

1

0

3

0

CO2

3

1

3

2

2

1

0

1

0

3

1

CO3

3

2

3

3

3

2

0

1

0

3

3

CO4

3

3

3

3

3

3

0

2

0

3

3

CO5

3

3

3

3

3

3

0

2

0

3

3

CO6

3

3

3

3

3

3

0

2

0

3

3

CO7

2

3

1

1

1

3

0

0

0

2

2

 


 

Detailed Syllabus:

 

 

1. Layout Design, Use of design rules, layout design of 1 CMOS circuit

2. Processing introduction: Substrate/wafer scribing/cleaving, Substrate/wafer wafer cleaning, spin-coating, lithography, etch and lift-off process for obtaining patterned deposited layers

3. GaAs processing and lithography: Process steps for GaAs (implanted/multilayer wafer) to pattern for carrier concentration, mobility measurements and optionally FET.

4. Thin film deposition by sputtering, evaporation and spin coating

5. Fabrication of Ohmic contacts, Schottky Diode and MOS Capacitor.  

6. Testing.       

Text books: 

  1.  "Semiconductor Material and Device Characterization" by Dieter K. Schroder (Wiley-IEEE Press; 3 edition (2015))
  1. “The Science and Engineering of Microelectronic Fabrication” by Stephen A Campbell (Oxford University Press; Second edition (2012))
  2. “VLSI Technology” by S.M. Sze (McGraw Hill Education; 2 edition (2017))


 

Name of the  Centre :CASEST

 

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC456  Title of the Course: MEMS Technology Laboratory

L-T-P:   0-0-4               Credits: 2

Prerequisite Course / Knowledge (If any): IC 452 MEMS and THz course (Theory).

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1:  Apply EDA tools working with Finite Element Method and the concept of Multiphysics and the conditions and constraints under which these techniques work.

CO-2 : Apply EDA tools to create  3D structures that function as MEMS or Surface Integrated Waveguide devices. 

CO-3 : Create MEMS devices using EDA tools suitable for sensing and communication applications and simulate them under the influence of different stimuli using Multiphysics techniques.

CO-4 :  Create MEMS structures suitable for RF and THz range applications.  

CO-5 : Create RF or Sensor device by SIW technology (Fabricate it after simulation and test them experimentally with connectorization). 

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

PSO5

CO1

3

3

3

3

3

2

1

2

3

1

3

CO2

3

3

3

3

3

2

1

2

3

1

3

CO3

3

3

3

3

3

2

1

2

3

1

3

CO4

3

3

3

3

3

3

1

2

3

1

3

CO5

3

3

3

3

3

3

1

2

3

1

3


 

Detailed syllabus:

 

Lab Experiments

 

  1. EDA tools for MEMS design and simulation, Familiarization of EDA tools. Modeling, material attributes, meshing and elements, choice of solvers, loads and load steps, post processing.

 

  1. Coupled field simulation using Multiphysics, 3D structure drawing in EDA tools, Design Examples.

 

  1. Simulation of a cantilever structure – Model, Harmonic and Transient analysis, Cantilever based chemical sensor design – by mass sensing route, Cantilever based RF switch, Membrane based RF switch, Membrane based piezoresistive  pressure sensor, Interdigitated  structure based MEMS devices and Otical micromirror. Any other examples suggested by the instructer.

 

  1. Design and simulate SIW based structures suitable for RF or sensing applications. It’s fabrication using composite polymer substrates and testing after connectorization.   
  2. Design and simulation of MEMS based sensors or RF / THz devices and presentation of the results as a project report.  

      

References:

  1. Materials provided by the EDA tool: Offline and online.
  1. MEMS: A Practical Guide of Design, Analysis, and Applications: by Jan KorvinkOliver Paul, Springer, ISBN-13: 978-3662568354


 

Name of the  Centre :CASEST

 

Name of the Academic Program  M.Tech (IC Technology)

 

Course Code:  IC457 Title of the Course:  IC Design Laboratory-1I

L-T-P:   0-0-8               Credits: 4

Prerequisite Course / Knowledge (If any): IC402 and IC403

 

Course Outcomes (COs) 

 

After completion of this course successfully, the students will be able to

 

CO-1: Understand the fixed point accuracy vs bitlength, Understand pipelining in detail.

 

CO2: Design and implement DSP on  FPGA 

 

CO3: Design and a System on Chip using FPGA

 

CO4:  Implement CMOS Inverters, logic gates in full-custom IC design flow.

 

CO5: Estimate power consumption and propagation delay by pre-layout and post-layout simulations

 

 

 

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

 

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

2

3

2

-

2

2

3

2

3

2

3

CO2

2

3

2

-

2

2

3

3

2

2

3

CO3

3

2

2

3

2

3

2

3

2

3

2

CO4

3

2

2

3

2

2

3

3

2

2

3

CO5

3

2

2

3

2

2

3

3

2

2

3


 

Detailed syllabus: 

List of Experiments and Mini-projects:

1: FIR filter design using MATLAB

2:  Fixed point simulation in MATLAB

3: Design and synthesis of FIR filter

4: CIC filter and pipelining Design and synthesis of FIR filter

5: Adding Peripherals in Programmable Logic

6: Creating and Adding Custom IP

7: Debugging using Vivado Logic Analyzer cores

8: CMOS Logic gates design

9: Estimation of power consumption and propagation delay of CMOS circuits.


 

Name of the Centre: CASEST

 

Name of the Academic Program M.Tech (IC Technology)

 

Course Code:  IC458 Title of the Course:   Project work+seminar+Dissertation+viva

L-T-P:              Credits: 48

Prerequisite Course / Knowledge (If any): First two semester course works

 

Course Outcomes (COs) 

 

After completion of the first two semester course work each student will do a two semester project in any area related to their study. After the completion of the one semester of the project work, the students will be able to 

 

CO-1:   Carryout literature survey in the field of study

 

CO2:  Define the problem.

 

CO3: Formulate the objectives and hypothesis.

 

CO4:  Communicate in the form of technical seminar

 

After the completion of the second semester of the project work, the students will be able to 

 CO5: Execute the experimental study in order to achieve the defined objectives

 

CO6: Implement the objective

 

CO7: Analyse and interpret the results

 

CO8: Communicate the results of the entire study in the form of technical 

 

Mapping of Course Outcomes (COs) with Program Outcomes (POs)

and Program Specific Outcomes (PSOs)

 

PO1

PO2

PO3

PO4

PO5

PO6

PSO1

PSO2

PSO3

PSO4

 

PSO5

CO1

1

1

1

 

1

 

 

 

 

 

2

CO2

2

1

3

 

2

 

 

 

 

 

2

CO3

3

1

3

 

3

 

 

 

 

 

2

CO4

1

3

1

 

3

3

 

 

 

 

2`

CO5

3

1

1

 

3

 

 

 

 

 

2

CO6

3

1

2

 

3

 

 

 

 

 

2

CO7

3

1

3

 

3

 

 

 

 

 

2

CO8

1

3

1

1

2

3

 

 

 

 

2